When evaluated, this vm instruction performs the vector to vector operation, specified by the immediate operator argument, using the argPtr, srcPtr, and tarPtr pointer registers plus the argInc, srcInc, and tarInc increment registers declared in the previous vmvecSetPointer instruction. The length of the vector(s) is determined by the register counter argument, and the scalar result is placed in the target register. The counter register must contain an Integer value. There are no conversions made between different types. The initial values in the three pointer registers, the three increment registers, and the counter register are NOT altered by this instruction. This instruction may return an Error value. After the operation, the Instruction Pointer is promoted. The operation of this vm instruction is expressed in the following C expressions:

  • add: {0} for (;--(int)counter > 0;argPtr+=argInc,srcPtr+=srcInc,tarPtr+=tarInc) *(double*)tarPtr = *(double*)srcPtr + *(double*)argPtr;
  • div: {1} for (;--(int)counter > 0;argPtr+=argInc,srcPtr+=srcInc,tarPtr+=tarInc) *(double*)tarPtr = *(double*)srcPtr / *(double*)argPtr;
  • mov: {2} for (;--(int)counter > 0;srcPtr+=srcInc,tarPtr+=tarInc) *(double*)tarPtr = *(double*)srcPtr;
  • mul: {3} for (;--(int)counter > 0;argPtr+=argInc,srcPtr+=srcInc,tarPtr+=tarInc) *(double*)tarPtr = *(double*)srcPtr * *(double*)argPtr;
  • sub: {4} for (;--(int)counter > 0;argPtr+=argInc,srcPtr+=srcInc,tarPtr+=tarInc) *(double*)tarPtr = *(double*)srcPtr - *(double*)argPtr;
  • swp: {5} for (;--(int)counter > 0;srcPtr+=srcInc,tarPtr+=tarInc) tmp = *(double*)tarPtr; *(double*)tarPtr = *(double*)srcPtr; *(double*)srcPtr = tmp;
  • The valid operator arguments are any immediate integer value, indicating the operation to be performed, or any one of the following symbolic operators:



    (vmvecNumVector operator counter)

    Name Format AIS Types



    Here are a number of links to Lambda coding examples which contain this instruction in various use cases.



    Keyword Links

    Here are a number of links to this instruction by related keywords.

    [...under construction ]


    Instruction Type

    Here are a number of links to this instructions of this same type.

    vmvecBinary vmvecInitialize vmvecLoop vmvecNumScalar
    vmvecNumVector vmvecPop vmvecPopNumber vmvecPush
    vmvecPushNumber vmvecSetIncrements vmvecSetPointers vmvecSwapCC


    Argument Types

    Here are a number of links which are related to this instructions .

    vmadd vmaddi vmaddn vmand
    vmapply vmargcount vmargfetch vmcadd
    vmcall vmcdiv vmcmul vmcsub
    vmdebugger vmdiv vmdivi vmdivn
    vmdivr vmdivri vmdivrn vmiadd
    vmiand vmiandb vmidiv vmidivr
    vmimul vmior vmiorb vmisub
    vmixor vmixorb vmjump vmjumpcc
    vmmul vmmuli vmmuln vmnadd
    vmnatAddInteger vmnatAddNumber vmnatAndInteger vmnatDivInteger
    vmnatDivNumber vmnatDivrInteger vmnatDivrNumber vmnatJumpCCInteger
    vmnatJumpCCNumber vmnatLoadFloat vmnatLoadInteger vmnatLoadLong
    vmnatLoadNumber vmnatLoadShort vmnatMulInteger vmnatMulNumber
    vmnatOrInteger vmnatSaveFloat vmnatSaveInteger vmnatSaveLong
    vmnatSaveNumber vmnatSaveShort vmnatShlInteger vmnatShrInteger
    vmnatSubInteger vmnatSubNumber vmnatXorInteger vmndiv
    vmndivr vmnmul vmnsub vmopt
    vmor vmpop vmpush vmrefbitvector
    vmrefbytevector vmrefdickey vmrefdicvalue vmrefdirkey
    vmrefdirvalue vmreffltvector vmrefintvector vmreflongvector
    vmrefmatrix vmrefnummatrix vmrefnumvector vmrefobjvector
    vmrefpcdvector vmrefshortvector vmrefstring vmrefstrkey
    vmrefstrvalue vmrefsymbol vmreftext vmrefvector
    vmregAbsNumber vmregAddImmediate vmregAddInteger vmregAddNumber
    vmregAddPointer vmregAndImmediate vmregAndInteger vmregCosNumber
    vmregDivImmediate vmregDivInteger vmregDivNumber vmregDivrImmediate
    vmregDivrInteger vmregDivrNumber vmregIncPointer vmregInteger
    vmregJump vmregJumpCCImmediate vmregJumpCCInteger vmregJumpCCNumber
    vmregLoadAddress vmregLoadDclType vmregLoadInteger vmregLoadJmpPointer
    vmregLoadNumber vmregLoadTail vmregLoadType vmregLogNumber
    vmregMoveImmediate vmregMoveInteger vmregMoveNumber vmregMulImmediate
    vmregMulInteger vmregMulNumber vmregNumber vmregObjLength
    vmregObjPointer vmregOrImmediate vmregOrInteger vmregPwrNumber
    vmregRefCharacter vmregRefFloat vmregRefInteger vmregRefLong
    vmregRefNumber vmregRefShort vmregRefXCharacter vmregRefXFloat
    vmregRefXInteger vmregRefXLong vmregRefXNumber vmregRefXShort
    vmregRefXWord vmregRunInHarware vmregSaveDeclType vmregSaveDeclTypeImmediate
    vmregSaveInteger vmregSaveNumber vmregSaveTail vmregSaveTailImmediate
    vmregSetCharImmediate vmregSetCharacter vmregSetFloat vmregSetIntImmediate
    vmregSetInteger vmregSetLong vmregSetLongImmediate vmregSetNumber
    vmregSetShort vmregSetShortImmediate vmregSetWord vmregSetXCharImmediate
    vmregSetXCharacter vmregSetXFloat vmregSetXIntImmediate vmregSetXInteger
    vmregSetXLong vmregSetXLongImmediate vmregSetXNumber vmregSetXShort
    vmregSetXShortImmediate vmregSetXWord vmregShlImmediate vmregShlInteger
    vmregShrImmediate vmregShrInteger vmregSinNumber vmregSqrtNumber
    vmregStringCompare vmregStringiCompare vmregSubImmediate vmregSubInteger
    vmregSubNumber vmregSubPointer vmregTanNumber vmregXorImmediate
    vmregXorInteger vmsend vmsetbitvector vmsetbytevector
    vmsetdickey vmsetdicvalue vmsetdirkey vmsetdirvalue
    vmsetfltvector vmsetintvector vmsetlongvector vmsetmatrix
    vmsetnummatrix vmsetnumvector vmsetobjvector vmsetpcdvector
    vmsetshortvector vmsetstring vmsetstrkey vmsetstrvalue
    vmsetvector vmshl vmshr vmsub
    vmsubi vmsubn vmvecBinary vmvecInitialize
    vmvecNumScalar vmvecNumVector vmvecPop vmvecPopNumber
    vmvecPush vmvecPushNumber vmvecSetIncrements vmvecSetPointers
    vmvecSwapCC vmvecUnary vmxor


    Virtual Machine Instructions

    AIS Lambdas are designed to be write-once-run-anywhere executable objects. This is accomplished via the virtual machine concept of software Lambda execution. Lambda virtual machines are designed to be mapped onto the actual host microchip at the server location, providing faithful Lambda execution wherever the Lambda may travel on the Internet. There are currently several virtual machines operating within Analytic Information Server. The DRM virtual machine uses a Dynamically typed Register Machine model to provide portable Lambda execution from high level dynamically typed instructions all the way to super fast microchip-level register execution. The DRM virtual machine runs in emulation mode during the testing and debug phases of Lambda development, and there is an AIS Lambda debugger available for Lambdas running on this virtual machine. During the final release phases of Lambda development, DRM virtual machine Lambdas are automatically converted to the NATIVE virtual machine on the host computer, using the just-in-time compiler. The NATIVE virtual machine is a faithful machine language translation of the execution rules in the DRM virtual machine onto the actual host microchip at the server location. NATIVE virtual machine execution runs at microchip-level execution speeds.

    How do I contact the AIS team?

    You can always talk with the AIS at aiserver.sourceforge.net.